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Dual-Core Lockstep enhanced with redundant multithread support and control-flow error detection

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URI: https://hdl.handle.net/10016/32696
ISSN: 0026-2714
DOI: https://doi.org/10.1016/j.microrel.2019.113447
UXXI: AR/0000024612
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Dual-Core_MR_2019_ps.pdf (791.38 KB)
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2019-09
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Elsevier
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This work presents a new Dual-Core LockStep approach to enhance fault tolerance in microprocessors. The proposed technique is based on the combination of software-based data checking and trace-based control-flow checking through an external hardware module. The hardware module is connected to the trace interface and is able to observe the execution of all the processors in the architecture. The proposed approach has been implemented for a dual core commercial processor. Experimental results demonstrate that the proposed technique has a high error detection capability with up to 99.63% error coverage.
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Peña-Fernández, M., Serrano-Cases, A., Lindoso, A., García-Valderas, M., Entrena, L., Martínez-Álvarez, A. & Cuenca-Asensi, S. (2019). Dual-Core Lockstep enhanced with redundant multithread support and control-flow error detection. Microelectronics Reliability, vol. 100-101, 113447.
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