Publication:
Improvement of Heterogeneous Systems Efficiency Using Self-Configurable FPGA-based Computing

dc.affiliation.dptoUC3M. Departamento de Informáticaes
dc.affiliation.grupoinvUC3M. Grupo de Investigación: Arquitectura de Computadores, Comunicaciones y Sistemases
dc.contributor.authorMelnyk, Anatolity
dc.contributor.authorMelnyk, Viktor
dc.contributor.editorCarretero Pérez, Jesús
dc.contributor.editorGarcía Blas, Javier
dc.contributor.editorBarbosa, Jorge
dc.contributor.editorMorla, Ricardo
dc.contributor.otherUniversidad Carlos III de Madrid. Computer Architecture, Communications and Systems Group (ARCOS)
dc.date.accessioned2015-11-11T09:29:52Z
dc.date.available2015-11-11T09:29:52Z
dc.date.issued2014-11
dc.descriptionProceedings of: First International Workshop on Sustainable Ultrascale Computing Systems (NESUS 2014). Porto (Portugal), August 27-28, 2014.en
dc.description.abstractComputer systems performance is is being improved today using two major approaches: general-purpose computers computing power increase (creation of multicore processors, multiprocessor computer systems, supercomputers), and adaptation of the computer hardware to the executed algorithm (class of algorithms). Last approach often provides application of the ASIC-based and FPGA-based hardware accelerators, also called reconfigurable, and is characterized by better performance / power consumption ratio and lower cost as compared to the general-purpose computers of equivalent performance. However, such systems have typical problems. The ASIC-based accelerators: 1) are effective for certain classes of algorithms only and 2) algorithms and software require adaptation for effective application. The FPGA-based accelerators and reconfigurable computer systems (that use FPGAs as a processing unit): 1) in the process of writing require a special program to perform computing tasks balancing between the general-purpose computer and FPGAs; 2) require designing the application-specific processor soft-cores; and 3) are effective for certain classes of problems only, for which application-specific processor soft-cores were previously developed. In this paper, we consider an emerging type of high-performance computer systems called self-configurable FPGA-based computer systems, which are deprived of specified challenges. We have analyzed the background of self-configurable computer systems creation, presented current results of our research, and introduced some ongoing works. Self-configurable computer systems are being developed within the project entitled "Improvement of heterogeneous systems efficiency using self-configurable FPGA-based computing" that is the part of the NESUS Action.en
dc.format.extent6
dc.format.mimetypeapplication/pdf
dc.identifier.bibliographicCitationCarretero Pérez, Jesús; et.al. (eds.). (2014) Proceedings of the First International Workshop on Sustainable Ultrascale Computing Systems (NESUS 2014): Porto, Portugal. Universidad Carlos III de Madrid, pp. 59-64.en
dc.identifier.isbn978-84-617-2251-8
dc.identifier.publicationfirstpage59
dc.identifier.publicationlastpage64
dc.identifier.publicationtitleProceedings of the First International Workshop on Sustainable Ultrascale Computing Systems (NESUS 2014): Porto, Portugalen
dc.identifier.urihttps://hdl.handle.net/10016/21977
dc.language.isoeng
dc.relation.eventdateAugust 27-28, 2014en
dc.relation.eventnumber1
dc.relation.eventplacePorto, Portugalen
dc.relation.eventtitleInternational Workshop on Sustainable Ultrascale Computing Systems (NESUS 2014)en
dc.rights.accessRightsopen access
dc.subject.ecienciaInformáticaes
dc.subject.otherField programmable gate arraysen
dc.subject.otherHigh performance computingen
dc.subject.otherReconfigurable computingen
dc.titleImprovement of Heterogeneous Systems Efficiency Using Self-Configurable FPGA-based Computingen
dc.typeconference paper*
dc.type.hasVersionVoR*
dspace.entity.typePublication
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