Reviriego Vasallo, PedroJunsangsri, PilinLiu, ShanshanLombardi, Fabrizio2022-01-172023-12-312021-12-31IEEE Transactions on Nanotechnology. (2021), v. 21, pp. 16-22.1536-125Xhttps://hdl.handle.net/10016/33888Data sketches (or summaries) are widely used to efficiently process large data sets and obtain relevant information, such as the number of distinct elements, their frequency or the similarity of several sets. Since sketches provide probabilistic estimates (hence accomplishing considerable reductions in storage and computational requirements), it seems that approximate hardware is appropriate for implementation providing an estimate rather than the exact value and enabling further improvements in metrics. In this paper, the use of voltage scaling in an approximate nanoscale FinFET-based memory for implementing sketches is studied and evaluated. To mitigate the errors introduced by the approximate memory, techniques to protect several widely used sketches when implemented in such voltage-scaled FinFET memory, are proposed. The proposed schemes preserve the sketches functionality with a negligible impact on the accuracy of their estimates and tolerate large bit error rates for sketches such as Minhash and HyperLogLog. The analysis and simulation results show that the intrinsic error tolerance of data sketches can be exploited to provide accurate estimates even when the memory suffers many errors due to the voltage scaling of the supply. Voltage scaling enables large power savings for Minhash and HyperLogLog. These initial results suggest that the use of approximate computing for data sketches is an interesting area for further research.6eng© 2021 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.Data SketchesApproximate computingError toleranceMemoriesresearch articleTelecomunicacioneshttps://doi.org/10.1109/TNANO.2021.3139394open access1622IEEE TRANSACTIONS ON NANOTECHNOLOGY21AR/0000029009