RT Dissertation/Thesis
T1 Contribution to the design of Capacitance-to-Digital Converters for medium-resolution multi-standard consumer sensors in standard CMOS technology
A1 Rogi, Christopher Igor
AB Capacitive sensors are omnipresent in both automotive and consumer applications. Micro-Electro-Mechanical-Systems (MEMS) are often used to transform a physical quantity (e.g. pressure, temperature,humidity, ...) to electrical quantities (e.g. capacitance, resistance, ...). Capacitanceto-Digital Converters (CDCs) are therefore of major significance. They permanently strive forperfection since they represent the State-of-the-Art in terms of an e cient electrical interface andadequate digital conversion of those capacitive sensors.The purpose of this research is to provide new insights into a specific converter family in thecontext of a CDC. While a vast amount of converter concepts has been discussed in the openliterature, this dissertation focuses on a simplified type of time-domain converter. To be morespecific, a Dual-Slope based Capacitance-to-Digital Converter is presented. The traditional Dual-Slope converter is modified to provide a switched-capacitor sensor readout, first-order noise-shapingand e cient multi-bit conversion using single-bit circuitry. It is based on an averaging concept andemploys a kind of time-domain resolution. A similar concept was already shown in the past. Itwas based on a continuous-time converter using a dedicated sensor readout stage. It is importantto point out that this new dissertation focuses on a direct sensor readout concept to utilize thediscrete-time benefits. As a result, both area and power e ciency are improved.The converter concept is proven on silicon in a standard 0.13 m process using both a realcapacitive pressure sensor and an on-chip dummy MEMS bridge. A 3.2ms measurement results in13bit resolution while consuming 35µA from a 1.5V supply occupying 0.148mm2. A comparison tothe State-of-the-Art proofs the converter concept to be competitive. However, a clear trend towardhybrid solutions can be seen, which indicates to be superior in many aspects. O ering a conceptwhich could be combined with other converters proof to be beneficial in terms of overall e ciency.A traditional first-order discrete-time    modulator is a very common building block within converters.Interestingly, a direct comparison shows many similarities to the proposed noise-shapingDual-Slope based concept. A high-level and circuit-level analysis is revealing, since it points out anoise- versus sensor power-consumption trade-o  between the two converter approaches. While the   concept is superior in terms of output resolution, the Dual-Slope converter is advantageous forlow-power medium-performance applications when large absolute sensor capacitors are present.An inherent property of the proposed Dual-Slope based converter is the availability of the quantizationerror in the analog domain. It is this fact which makes it easy to be used within aMulti-stAge-noise-SHaping (MASH) architecture. This concept is proven within a 1-1 MASH exampleon both system- and circuit-level where two Dual-Slope based converters are used. It is alsoworth mentioning, that the second stage could be exchanged by any type of converter. However, amismatch analysis indicates commonly high matching requirements. Further adaptations towardsSturdy-MASH (SMASH) architectures would be necessary to be more competitive.
YR 2020
FD 2020-03
LK https://hdl.handle.net/10016/31762
UL https://hdl.handle.net/10016/31762
LA eng
NO Mención Internacional en el título de doctor
DS e-Archivo
RD 27 jul. 2024