A hardware-software approach for on-line soft error mitigation in interrupt-driven applications

e-Archivo Repository

Show simple item record

dc.contributor.author Martínez-Álvarez, Antonio
dc.contributor.author Restrepo-Calle, Felipe
dc.contributor.author Cuenca-Asensi, Sergio
dc.contributor.author Reyneri, Leonardo M.
dc.contributor.author Lindoso Muñoz, Almudena
dc.contributor.author Entrena Arrontes, Luis Alfonso
dc.date.accessioned 2022-02-02T12:14:48Z
dc.date.available 2022-02-02T12:14:48Z
dc.date.issued 2016-07-01
dc.identifier.bibliographicCitation Martinez-Alvarez, A., Restrepo-Calle, F., Cuenca-Asensi, S., Reyneri, L. M., Lindoso, A. & Entrena, L. (2016). A Hardware-Software Approach for On-Line Soft Error Mitigation in Interrupt-Driven Applications. IEEE Transactions on Dependable and Secure Computing, 13(4), 502–508.
dc.identifier.issn 1545-5971
dc.identifier.uri http://hdl.handle.net/10016/34015
dc.description.abstract Integrity assurance of configuration data has a significant impact on microcontroller-based systems reliability. This is especially true when running applications driven by events which behavior is tightly coupled to this kind of data. This work proposes a new hybrid technique that combines hardware and software resources for detecting and recovering soft-errors in system configuration data. Our approach is based on the utilization of a common built-in microcontroller resource (timer) that works jointly with a software-based technique, which is responsible to periodically refresh the configuration data. The experiments demonstrate that non-destructive single event effects can be effectively mitigated with reduced overheads. Results show an important increase in fault coverage for SEUs and SETs, about one order of magnitude.
dc.description.sponsorship This work was funded in part by the Spanish Ministry of Education, Culture and Sports with the project "Developing hybrid fault tolerance techniques for embedded microprocessors" (PHB2012-0158-PC).
dc.format.extent 7
dc.language.iso eng
dc.publisher IEEE
dc.rights © 2015 IEEE.
dc.subject.other Single Event Upset (Seu)
dc.subject.other Single Event Transient (Set)
dc.subject.other Fault tolerance
dc.subject.other Soft error mitigation
dc.subject.other Radiation effects
dc.subject.other Co-design approach
dc.subject.other Embedded systems
dc.subject.other Emulation
dc.subject.other Injection
dc.title A hardware-software approach for on-line soft error mitigation in interrupt-driven applications
dc.type article
dc.subject.eciencia Electrónica
dc.subject.eciencia Telecomunicaciones
dc.identifier.doi https://doi.org/10.1109/TDSC.2014.2382593
dc.rights.accessRights openAccess
dc.relation.projectID Gobierno de España. PHB2012-0158-PC
dc.type.version acceptedVersion
dc.identifier.publicationfirstpage 502
dc.identifier.publicationissue 4
dc.identifier.publicationlastpage 508
dc.identifier.publicationtitle IEEE Transactions on Dependable and Secure Computing
dc.identifier.publicationvolume 13
dc.identifier.uxxi AR/0000018280
dc.contributor.funder Ministerio de Educación, Cultura y Deporte (España)
 Find Full text

Files in this item

*Click on file's image for preview. (Embargoed files's preview is not supported)


This item appears in the following Collection(s)

Show simple item record