Online error detection through trace infrastructure in ARM microprocessors

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This paper presents a solution for error detection in ARM microprocessors based on the use of the trace infrastructure. This approach uses the Program and Instrumentation Trace Macrocells that are part of ARM's CoreSight architecture to detect control-flow and data-flow errors, respectively. The proposed approach has been tested with low-energy protons. Experimental results demonstrate high accuracy with up to 95% of observed errors detected in a commercial microprocessor with no hardware modification. In addition, it is shown how the proposed approach can be useful for further analysis and diagnosis of the cause of errors.
ARM, Error detection, Fault tolerance, Microprocessor trace
Bibliographic citation
Pena-Fernandez, M., Lindoso, A., Entrena, L., Garcia-Valderas, M., Morilla, Y. & Martin-Holgado, P. (2019). Online Error Detection Through Trace Infrastructure in ARM Microprocessors. IEEE Transactions on Nuclear Science, 66(7), pp. 1457–1464.