Bypassing the CAMAC data bus to read out FERA data at higher rates

Abstract

The CAMAC standard offers flexibility by providing power and a data bus for various modules, but it is limited to a 1 Mword/sec bandwidth. LeCroy Research CAMAC modules with an auxiliary data bus, FERA, provide a 10 Mwordsec data transfer without CAMAC controller intervention. We have used a National Instruments digital 1/0 board (PCI-DIO- 32HS) as a FERA bus-to-host bridge. The board provides hardware handshaking, a 20 Mword/sec bandwidth, bus master scatter-gather DMA, and can control up to 2 FERA busses asynchronously. Multiple boards may reside on the same PCI or Compact PCI bus. A 300 MHz Pentium I1 running Windows NT 4.0 sustains >3.4 MB/sec throughput in 8255 emulation mode. These capabilities are being exploited in our prototype small animal planar and PET imaging system where 32 ADC channels (16 bits each) and 3 scaler channels (32 bits each) define an event.